Sachan
Rai

I'm a Computer Engineering student at the University of Waterloo. Most of what I build touches both hardware and software: firmware for STM32 and ESP32 boards, PCBs drawn up in KiCad, and full-stack AI services running in production. The problems I enjoy most sit at that boundary, where the code has to account for the physical device it runs on.

Software Engineering Intern

NARRATIVE PROJECTS · TORONTO, ON

• Designed an inbound email parsing webhook, routing mail via an MX record and processing 100+ daily messages, recovering threads via header and subject matching.
• Replaced an in-app messaging system with an email-driven Comms Hub in Node.js + TypeScript on Cloud Run, AI-tagging emails to products at 90% accuracy across 1000+ products.
• Self-hosted the OpenClaw AI framework on a GCP Compute Engine VM to power email-driven order intake and daily inbox digests, scoped under an IAM-controlled service account.

System Operations Intern

CANADIAN ANALYTICAL LABORATORIES · MISSISSAUGA, ON

• Audited 200+ IT assets across 4 departments via a standardized ITAM tracker, surfacing end-of-life devices and warranty gaps to inform the infrastructure refresh and budget cycle.
• Configured workstations for lab, regulatory, QA, and admin teams with standardized Windows builds and chromatography systems (Waters Empower, Agilent OpenLab) under GMP/Health Canada standards.
• Coordinated rollouts with scientists, IT leads, and regulatory staff, scheduling cutovers around active assay runs to deliver upgrades with zero downtime.

Controls Engineer

WATERLOO ROCKETRY · WATERLOO, ON

• Engineered a mechanical airbrake system in SOLIDWORKS with symmetric deployable drag panels within the airframe and mass budget, for a projected 20% aerodynamic efficiency gain.
• Designed and tested a custom PCB airbrake control board in KiCad, integrating sensor inputs and filtering noisy telemetry in real time to deliver deployment commands.
• Partnered with avionics and recovery to integrate the airbrake PCB with the flight computer's data and power buses, resolving cross-subsystem issues to lock in a flight-ready revision.

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